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 19-3037; Rev 2; 2/05
High-Bandwidth, Quad DPDT Switches
General Description
The MAX4760/MAX4761 (DPDT) analog switches operate from a single +1.8V to +5.5V supply. These switches feature a low 25pF capacitance for high-speed data switching applications. The MAX4760 is a quad double-pole/double-throw (DPDT) switch and the MAX4761 is an octal singlepole/double-throw (SPDT) switch. They have eight 3.5 on-resistance, low-capacitance switches to route audio and data signals. The MAX4760 has 4 logic inputs to control the switches in pairs. The MAX4761 has one logic control input and an enable input (EN) to disable the switches. The MAX4760/MAX4761 are available in a small 36-pin (6mm x 6mm) thin QFN and 36-bump (3mm x 3mm) chip-scale package (UCSPTM).
Features
o USB 1.1 and USB 2.0 (Full Speed) SignalSwitching Compliant o Data and Audio Signal Routing o Low-Capacitance (25pF) Data Switches o Less than 0.2ns Skew o -3dB Bandwidth: 325MHz o 0.2 Channel-to-Channel Matching o 0.8 On-Resistance Flatness o Rail-to-Rail Signal Handling o 0.03% THD o +1.8V to +5.5V Supply Range o Tiny 36-Bump UCSP (3mm x 3mm) o 36-Pin Thin QFN (6mm x 6mm)
MAX4760/MAX4761
Applications
USB Signal Switching Audio-Signal Routing Cellular Phones PDAs/Hand-Held Devices Notebook Computers
PART MAX4760EBX-T MAX4760ETX MAX4761EBX-T MAX4761ETX
Ordering Information
TEMP RANGE PIN-PACKAGE -40C to +85C 36 UCSP-36 -40C to +85C 36 Thin QFN (6mm x 6mm) -40C to +85C 36 UCSP-36 -40C to +85C 36 Thin QFN (6mm x 6mm)
Functional Diagrams
INA NO1 DATA 1 COM1 NC1 NO2 DATA 2 COM2 NC2 INB NO3 NC2 NO3 COM3 NC3 NO4 DATA 4 COM4 NC4 INC NO5 NC4 NO5 COM5 NC5 NO6 DATA 6 COM6 NC6 IND NO7 NC6 NC5 NO6 DATA 6 COM6 NC3 NO4 DATA 4 COM4 NC1 NO2 DATA 2 COM2 INA NO1 DATA 1 COM1
DATA 3
DATA 3 COM3
DATA 5
DATA 5 COM5
DATA 7 COM7
NO7
DATA 7 COM7
NC7 NO8
DATA 8 COM8
NC7 NO8
DATA 8 COM8
NC8
NC8
MAX4760
EN
MAX4761
Pin Configurations/Functional Diagrams/Truth Table continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.) V+, IN_, EN...............................................................-0.3V to +6V COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V) Continuous Current NO_, NC_, COM_ .......................................................100mA Peak Current (pulsed at 1ms, 10% duty cycle)................................200mA (pulsed at 1ms, 50% duty cycle)............................... 300mA Continuous Power Dissipation (TA = +70C) 36-Bump UCSP (derate 15.3mW/C above +70C).... 1221mW 36-Pin Thin QFN (derate 26.3mW/C above +70C)... 2105mW ESD per Method 3015.7.......................................................2kV Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) ................................ +300C Bump Temperature (soldering) Infrared (15s) ...............................................................+220C Vapor Phase (60s) .......................................................+215C
Note 1: Signals on NO_, NC_, COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = +2.7V to +5.25V, TA = -40C to +85C, unless otherwise noted. Typical values are at V+ = 3V, TA = +25C.) (Notes 2, 3)
PARAMETER ANALOG SWITCH Analog Signal Range On-Resistance (Note 4) On-Resistance Match Between Channels (Notes 4, 5) On-Resistance Flatness (Note 6) NO_, NC_ Off-Leakage Current COM_ Off-Leakage Current COM_ On-Leakage Current DYNAMIC Turn-On Time Turn-Off Time tON tOFF VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF, Figure 2 V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF, Figure 2 +25C TMIN to TMAX +25C TMIN to TMAX 25 45 140 150 50 60 ns ns ICOM_(ON) VCOM_, VNO_, V RON RON TMIN to TMAX V+ = 2.7V, ICOM_ = 10mA, VNC_ or VNO_ = 0V or V+ V+ = 2.7V, ICOM_ = 10mA, VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_=10mA, VNC_ or VNO_ = 0V or V+ V+ = 3.6V; VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 0.3V, 3.3V V+ = 3.6V (MAX4761); VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 0.3V, 3.3V V+ = 3.6V; VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 3.3V, 0.3V or floating +25C TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX -5 -25 -5 -25 -5 -25 0.01 0.8 0.2 0 2.0 V+ 3.5 4 0.4 0.55 1.5 1.8 +5 nA +25 +5 +25 +5 +25 nA nA V SYMBOL CONDITIONS TA MIN TYP MAX UNITS
RFLAT(ON) INO_(OFF), INC_(OFF)
2
_______________________________________________________________________________________
High-Bandwidth, Quad DPDT Switches
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +5.25V, TA = -40C to +85C, unless otherwise noted. Typical values are at V+ = 3V, TA = +25C.) (Notes 2, 3)
PARAMETER Break-Before-Make (Note 7) Skew (Note 7) Charge Injection On-Channel -3dB Bandwidth Off-Isolation (Note 8) Crosstalk (Note 9) Total Harmonic Distortion NO_, NC_ Off-Capacitance COM_ On-Capacitance COM_ Off-Capacitance DIGITAL I/O (IN_, EN) Input-Logic High Input-Logic Low Input Leakage Current POWER SUPPLY Power-Supply Range Positive Supply Current V+ I+ V+ = 4.3V, VIN_ = 0V or V+ TMIN to TMAX +25C TMIN to TMAX 1.8 0.01 1.0 5.5 V A VIH VIL IIN V+ = 2.7V to 3.6V V+ = 3.6V to 5.25V V+ = 2.7V to 3.6V V+ = 3.6V to 5.25V VIN = 0 or V+ TMIN to TMAX TMIN to TMAX TMIN to TMAX TMIN to TMAX TMIN to TMAX 1.4 2.0 0.5 0.6 1 V V A SYMBOL tBBM tSKEW Q BW VISO VCT THD CONDITIONS V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50, CL = 35pF, Figure 3 RS = 39, CL = 50pF, Figure 4 VGEN = 0V, RGEN = 0, CL = 1.0nF, Figure 5 Signal = 0dBm, CL = 5pF, RL = 50 CL = 5pF, RL = 50, VCOM_ = 1VP-P, f = 100kHz, Figure 6 CL = 5pF, RL = 50, VCOM_ = 1VP-P, f = 100kHz, Figure 6 f = 20Hz to 20kHz, 1VP-P, RL = 600 TA +25C TMIN to TMAX +25C +25C +25C +25C +25C +25C +25C +25C +25C 2 0.2 15 320 100 95 0.03 25 54 25 0.5 MIN TYP 15 MAX UNITS ns ns pC MHz dB dB % pF pF pF
MAX4760/MAX4761
CNO_(OFF), VNO_, VNC_ = GND, f = 1MHz, CNC_(OFF) Figure 7 CCOM(ON) CCOM(OFF) VNO_, VNC_ = GND, f = 1MHz, Figure 7 VCOM_ = GND, f = 1MHz (MAX4761), Figure 7
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Note 3: UCSP packages are 100% tested at +25C and limits across the full temperature range are guaranteed by correlation and design. Thin QFN packages are 100% tested at +85C and limits across the full temperature range are guaranteed by correlation and design. Note 4: RON and RON matching specifications are guaranteed by design. Note 5: RON = RON(MAX) - RON(MIN). Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 7: Guaranteed by design, not production tested. Note 8: Off-isolation = 20log10 [VCOM_ / (VNO_ or VNC_)], VCOM_ = output, VNO_ or VNC_ = input to off switch. Note 9: Between any two switches.
_______________________________________________________________________________________
3
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Typical Operating Characteristics
(V+ = 3V, TA = +25C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
MAX4760 toc01
ON-RESISTANCE vs. VCOM AND TEMPERATURE
MAX4760 toc02
ON-RESISTANCE vs. VCOM AND TEMPERATURE
V+ = 5V
MAX4760 toc03
10 9 8 7 V+ = 1.8V
5 V+ = 3V 4 TA = +85C TA = +25C
5
4
RON ()
RON ()
6 5 4 3 2 1 0 V+ = 3V 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCOM (V) V+ = 2.7V V+ = 5V V+ = 2V V+ = 2.3V
RON ()
3
3
TA = +85C
TA = +25C
2
2
1
TA = -40C
1 TA = -40C
0 0 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCOM (V)
NO/NC OFF-LEAKAGE CURRENT vs. TEMPERATURE
MAX4760 toc04
COM ON-LEAKAGE CURRENT vs. TEMPERATURE
MAX4760 toc05
COM OFF-LEAKAGE CURRENT vs. TEMPERATURE
V+ = 3V/5V COM OFF-LEAKAGE CURRENT (nA)
MAX4760 toc06
10 V+ = 3V/5V NO/NC OFF-LEAKAGE CURRENT (nA)
10 V+ = 3V/5V COM ON-LEAKAGE CURRENT (nA)
10
1 V+ = 5V 0.1 V+ = 3V 0.01
1 V+ = 5V 0.1 V+ = 3V
1 V+ = 5V
0.1
V+ = 3V
0.01
0.001 -40 -15 10 35 60 85 TEMPERATURE (C)
0.001 -40 -15 10 35 60 85 TEMPERATURE (C)
0.01 -40 -15 10 35 60 85 TEMPERATURE (C)
CHARGE INJECTION vs. VCOM
CL = 1nF 50 CHARGE INJECTION (pC) 40 V+ = 5V 30 20 10 0 0 1 2 3 4 5 VCOM (V) V+ = 3V
MAX4760 toc07
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX4760 toc08
SUPPLY CURRENT vs. TEMPERATURE
MAX4760 toc09
60
4.0 3.5 SUPPLY CURRENT (nA) 3.0 2.5 2.0 1.5 1.0 0.5 0
1000
SUPPLY CURRENT (nA)
V+ = 5V 10
V+ = 3V 0.1
0.001 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) -40 -15 10 35 60 85 TEMPERATURE (C)
4
_______________________________________________________________________________________
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Typical Operating Characteristics (continued)
(V+ = 3V, TA = +25C, unless otherwise noted.)
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
MAX4760 toc10
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
MAX4760 toc11
TURN-ON/OFF TIMES vs. TEMPERATURE
MAX4760 toc12
2.0
80 70 tON 60 tON/tOFF (ns) 50 40 30 20 10 tOFF
70 60 tON, V+ = 3V 50 tON/tOFF (ns) 40 30 20 tOFF, V+ = 3V 10 tOFF, V+ = 5V 0 tON, V+ = 5V
1.6 LOGIC THRESHOLD (V)
1.2 VIH VIL 0.8
0.4
0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY CURRENT (V)
0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
TEMPERATURE (C)
SKEW vs. SUPPLY VOLTAGE
INPUT RISE/FALL TIME = 15ns CL = 50pF, FIGURE 3
MAX4760 toc13
SKEW vs. TEMPERATURE
MAX4760 toc14
FREQUENCY RESPONSE
0 -20 ON-LOSS (dB) ON-LOSS CROSSTALK -60 -80 OFF-ISOLATION -100 -120
MAX4760 toc15
600 500 400 SKEW (ps)
600 500 400 SKEW (ps) 300 200 100 0 INPUT RISE/FALL TIME = 15ns CL = 50pF, FIGURE 3 V+ = 4.2V
20
-40
300 200 100 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
-140 0.0001
0.01
1
100
TEMPERATURE (C)
FREQUENCY (MHz)
TOTAL HARMONIC DISTORTION vs. FREQUENCY
RL = 600
MAX4760 toc16
1
THD (%)
0.1
0.01 10 100 1k FREQUENCY (Hz) 10k 100k
_______________________________________________________________________________________
5
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Pin Description
PIN MAX4760 THIN QFN 1 2 3 4 5 6 7 8 9 10 11, 14, 17, 29, 32, 35 12 13 15 16 18 19 20 21 22 23 24 25 26 27 28 30 31 33 34 36 -- EP UCSP A1 B2 A2 A3 C3, D4 A4 A5 B5 A6 B6 MAX4761 THIN QFN 1 2 3 4 5 -- 7 8 9 10 6, 11, 14, 17, 24, 29, 32, 35 12 13 15 16 18 19 20 21 -- 23 -- 25 26 27 28 30 31 33 34 36 22 EP UCSP A1 B2 A2 A3 C3, D4 -- A5 B5 A6 B6 NC1 COM2 NC2 INA V+ INB NC3 COM3 NC4 COM4 Analog Switch 1, Normally Closed Terminal 1 Analog Switch 2, Common Terminal 2 Analog Switch 2, Normally Closed Terminal 2 Logic Control Digital Input for the MAX4760 Switch 1 and Switch 2. Digital control input for all MAX4761 switches. Positive Supply Voltage Logic Control Digital Input for Switches 3 and 4 Analog Switch 3, Normally Closed Terminal 3 Analog Switch 3, Common Terminal 2 Analog Switch 4, Normally Closed Terminal 4 Analog Switch 4, Common Terminal 4 NAME FUNCTION
--
A4, F3
N.C.
No Connection. Not internally connected.
C5 C6 D6 D5 E6 F6 E5 F5 F4 C4, D3 F3 F2 E2 F1 E1 D2 D1 C1 C2 B1 -- --
C5 C6 D6 D5 E6 F6 E5 F5 -- C4, D3 -- F2 E2 F1 E1 D2 D1 C1 C2 B1 F4 --
NO3 NO4 NO8 NO7 COM8 NC8 COM7 NC7 IND GND INC NC6 COM6 NC5 COM5 NO6 NO5 NO1 NO2 COM1 EN EP
Analog Switch 3, Normally Open Terminal 3 Analog Switch 4, Normally Open Terminal 4 Analog Switch 8, Normally Open Terminal 8 Analog Switch 7, Normally Open Terminal 7 Analog Switch 8, Common Terminal 8 Analog Switch 8, Normally Closed Terminal 8 Analog Switch 7, Common Terminal 7 Analog Switch 7, Normally Closed Terminal 7 Logic Control Digital Input for Switches 7 and 8 Ground Logic Control Digital Input for Switches 5 and 6 Analog Switch 6, Normally Closed Terminal 2 Analog Switch 6, Common Terminal 6 Analog Switch 5, Normally Closed Terminal 5 Analog Switch 5, Common Terminal 5 Analog Switch 6, Normally Open Terminal 6 Analog Switch 5, Normally Open Terminal 5 Analog Switch 1, Normally Open Terminal 1 Analog Switch 2, Normally Open Terminal 1 Analog Switch 1, Common Terminal 1 Output Enable, Active Low Exposed Pad, Connect to GND.
6
_______________________________________________________________________________________
High-Bandwidth, Quad DPDT Switches
Detailed Description
The MAX4760 quad double-pole/double-throw (DPDT) and the MAX4761 octal single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. These devices are fully specified for +3V applications. The MAX4760/MAX4761 have a guaranteed 3.5 (max) on-resistance to switch data or audio signals. The low 25pF capacitance and 0.2ns change in skew makes them ideal for data switching applications. The MAX4760 has 4 logic inputs to control two switches in pairs and the MAX4761 has one logic control input and an enable input (EN) to disable the switches.
POSITIVE SUPPLY V+ D1
MAX4760/MAX4761
MAX4760 MAX4761
NO COM
Applications Information
Digital Control Inputs
The MAX4760/MAX4761 logic inputs accept up to +5.5V regardless of the supply voltage. For example, with a +3.3V supply, IN_ can be driven low to GND and high to +5.5V, which allows mixed logic levels in a system. Driving the control logic inputs rail-to-rail also minimizes power consumption. For a +3V supply voltage, the logic thresholds are 0.5V (low) and 1.4V (high). For the MAX4761, drive EN low to enable. When EN is high, COM_ is high impedance.
GND
Figure 1. Overvoltage Protection Using an External Blocking Diode
Power-Supply Sequencing
CMOS devices require proper power-supply sequencing. Always apply V+ before the analog signals, especially if the input signal is not current limited. If sequencing is not possible, and the input signal is not current limited to less than 20mA, add a small-signal diode (Figure 1). Adding the diode reduces the analog range to a diode drop (0.7V) below V+ and increases the on-resistance slightly. The maximum supply voltage must not exceed +6V at any time.
Analog Signal Levels
Analog signal inputs over the full voltage range (0V to V+) are passed through the switch with minimal change in onresistance (see the Typical Operating Characteristics). The switches are bidirectional so NO_, NC_, and COM_ can be either inputs or outputs.
UCSP Applications Information
For the latest application details on UCSP construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, go to the Maxim website at www.maxim-ic.com/ucsp for the Application Note, "UCSP--A Wafer-Level Chip-Scale Package."
Power-Supply Bypassing
Power-supply bypassing improves noise margin and prevents switching noise from propagating from the V+ supply to other components. A 0.1F capacitor connected from V+ to GND is adequate for most applications.
_______________________________________________________________________________________
7
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Timing Circuits/Timing Diagrams
MAX4760 MAX4761
VN_ NO_ OR NC_ RL IN_ LOGIC INPUT GND SWITCH OUTPUT 0V CL VOUT 0.9 x V0UT V+ V+ COM_ LOGIC INPUT VOUT t OFF 0.9 x VOUT V+ 0V 50%
t r < 5ns t f < 5ns 50%
t ON
CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL VOUT = VN_ RL + RON
(
)
IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 2. Switching Time
MAX4760 MAX4761
VN_ NC_ NO_ IN_ LOGIC INPUT GND
V+ V+ COM_ RL VOUT LOGIC INPUT
V+ 50% 0V
CL
VOUT tBBM CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
0.9 x VOUT
Figure 3. Break-Before-Make Interval
8
_______________________________________________________________________________________
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Timing Circuits/Timing Diagrams (continued)
tri 50% TxD+ Rs A B CL INPUT A90% 50% 10% tfi INPUT A 10% tskew_i
90%
tro 50%
90%
TxDRs Rs = 39 CL = 50pF
A-
BCL
OUTPUT B OUTPUT B-
10%
tskew_o 90% 50% 10% tfo
|tro - tri| DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS. |tfo - tfi| DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS.
|tskew_o| CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS. |tskew_i| CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS.
Figure 4. Input/Output Skew Timing Diagram
V+
MAX4760 MAX4761
RGEN NC_ OR NO_ GND IN_
VOUT VOUT VOUT CL IN OFF ON OFF
V+ COM_
V GEN
VIL TO VIH
IN
OFF
ON Q = (V OUT )(C L )
OFF
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 5. Charge Injection _______________________________________________________________________________________ 9
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Timing Circuits/Timing Diagrams (continued)
+5V 10nF NETWORK ANALYZER 0V OR V+ IN_ V+ COM1 VIN 50 50 V OFF-ISOLATION = 20log OUT VIN ON-LOSS = 20log VOUT VIN VOUT VIN
NC1 50
MAX4760 MAX4761
NO1* GND
CROSSTALK = 20log VOUT MEAS REF
50
50
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND ON NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
*FOR CROSSTALK THIS PIN IS NO2. NC2 AND COM2 ARE OPEN.
Figure 6. On-Loss, Off-Isolation, and Crosstalk
Typical Operating Circuit
10nF V+ INA NO1 COM1 HEADPHONES RIGHT
V+ COM_
NC1 NO2
MAX4760 MAX4761
IN VIL OR VIH
NC2 COM2 HEADPHONES LEFT
CAPACITANCE METER f = 1MHz
NC_ or NO_ GND
INO NO7
COM7 SWITCHING DATA SIGNALS
NC7 NO8
Figure 7. Channel On-/Off-Capacitance
NC8
COM8
MAX4760
10
______________________________________________________________________________________
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Pin Configurations/Truth Tables
TOP VIEW MAX4760 (BUMP SIDE DOWN)
COM1 N.C. NO2 NO1 NO5 N.C. NO6 COM5 N.C.
1 2 3 4 5 6
36
35
34
33
32
31
30
29
A NC1 COM1 B NO1 C NO5 D COM5 E NC5 F NC6 INC IND NC7 NC8 COM6 COM7 COM8 NO6 GND V+ NO7 NO8 NO2 V+ GND NO3 NO4 INA V+ INB NC3 COM3 NC4 COM2 COM3 COM4 COM2 NC2
28
NC1
NC2
INA
INB
NC3
NC4
1 2 3 4 5 6 7 8 9 17 10 11 12 13 14 15 16 18
27 26 25 24
NC5 COM6 NC6 INC GND IND NC7 COM7 NC8
MAX4760
23 22 21 20 19
NO3
NO4
NO8
COM4
NO7
N.C.
N.C.
N.C.
UCSP MAX4760
INA NO1/NO2 OFF LOW ON HIGH INB NO3/NO4 OFF LOW ON HIGH INC NO5/NO6 LOW OFF HIGH ON IND NO7/NO8 LOW OFF HIGH ON NC1/NC2 ON OFF NC3/NC4 ON OFF NC5/NC6 ON OFF NC7/NC8 ON OFF
THIN QFN
NOTE: EXPOSED PADDLE CONNECTED TO GND OR FLOATING.
MAX4761
EN LOW LOW HIGH HIGH INA LOW HIGH X X NO_ OFF ON OFF OFF NC_ ON OFF OFF OFF
______________________________________________________________________________________
COM8
11
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Pin Configurations/Truth Tables (continued)
TOP VIEW MAX4761 (BUMP SIDE DOWN)
COM1 N.C. NO2 NO1 NO5 N.C. NO6 COM5 N.C.
1 2 3 4 5 6
36
35
34
33
32
31
30
29
A NC1 COM1 B NO1 C NO5 D COM5 E NC5 F NC6 N.C. EN NC7 NC8 COM6 COM7 COM8 NO6 GND V+ NO7 NO8 NO2 V+ GND NO3 NO4 INA V+ N.C. NC3 COM3 NC4 COM2 COM3 COM4 COM2 NC2
28
NC1
NC2
INA
N.C.
NC3
NC4
1 2 3 4 5 6 7 8 9 17 10 11 12 13 14 15 16 18
27 26 25 24
NC5 COM6 NC6 N.C. GND EN NC7 COM7 NC8
MAX4761
23 22 21 20 19
NO3
NO4
NO8
COM4
NO7
N.C.
N.C.
N.C.
UCSP
THIN QFN
NOTE: EXPOSED PADDLE CONNECTED TO GND.
Chip Information
TRANSISTOR COUNT: 1432 PROCESS: CMOS
12
______________________________________________________________________________________
COM8
High-Bandwidth, Quad DPDT Switches
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QFN THIN 6x6x0.8.EPS
MAX4760/MAX4761
D2 D D/2 k
C L
b D2/2
E/2 E2/2 E (NE-1) X e
C L
E2
k
e (ND-1) X e
L
e L
C L C L
L1 L L
e
e
A1
A2
A
PACKAGE OUTLINE 36, 40, 48L THIN QFN, 6x6x0.8mm
21-0141
E
1 2
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT FOR 0.4mm LEAD PITCH PACKAGE T4866-1. 10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PACKAGE OUTLINE 36, 40, 48L THIN QFN, 6x6x0.8mm
21-0141
E
2 2
______________________________________________________________________________________
13
High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
36L,UCSP.EPS
PACKAGE OUTLINE, 6x6 UCSP 21-0082 J
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.


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